Non-ECC dual channel shared2 DDR2 SDRAM system memory (533Mhz)
Error Correcting
transfers data on rising and falling edges of clock cycle
transfers data 2x on rising and falling edge of clock cycle. Taken from Wikipedia article.


DDR2-xxx (or DDR-xxx) denotes effective clockspeed.


PC2-xxxx (or PC-xxxx) denotes theoretical bandwidth (though it is often rounded up or down). Bandwidth is calculated by taking effective clockspeed and multiplying by eight. This is because DDR2 can transfer 64 bits of data each clock cycle, and since a byte is comprised of 8 bits, this equates to 8 bytes of data per clock cycle.